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| STV6412A AUDIO/VIDEO SWITCH MATRIX FEATURES s s s s IC Bus Control Standby Mode with Interrupt Signal Output Video Section - 4 CVBS Inputs, 3 CVBS Outputs (one with Selectable Chroma Trap Filter) - 3 Y/C Inputs, 2 Y/C Outputs - 6 dB Gain on all CVBS/Y and C Outputs - Integrated 150 Buffers - 1 Y/C Adder - 2 RGB/FB Inputs, 1 Tri-state RGB/FB Output with 6 dB Adjustable Gain (from +3dB to +9dB) - Video Muting on all Outputs - 2 Slow Blanking Inputs/Outputs - Sync Bottom Clamp on all CVBS/Yand RGB Inputs, Average Clamp on C Inputs - Bandwidth: 15 MHz - Crosstalk: 50 dB Minimum Audio Section - 4 Stereo Inputs, 3 Stereo Outputs - 1 Mono-Sound Output - Stereo-to-Mono Sound Capability - 0/6/9 dB Selectable Gain on one Stereo Input - Full Range Volume Control with Soft Control - Audio Muting on all Outputs TQFP64 (14 x 14 x 1.40 mm) (Thin Full Plastic Quad Flat Pack) ORDER CODE: STV6412ADT DESCRIPTION The STV6412A is a highly integrated IC bus-controlled audio and video switch matrix, optimized for use in digital set-top box applications. It provides all the audio and video routings required in a full two SCART set-top box design. September 2003 1/24 1 Table of Contents 1 GENERAL OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 Latch Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 RECOMMENDED OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 AUDIO SECTION CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 VIDEO SECTION CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 CHROMA SECTION CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.6 BLANKING SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 IC BUS CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 I C BUS SELECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.1 I2C BUS ADDRESSES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.2 POWER-ON RESET -- BUS REGISTER INITIAL CONDITIONS . . . . . . . . . . . . . . . . . . . 17 4 INPUT/OUTPUT GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 APPLICATION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2 24 2/24 1 STV6412A 1 GENERAL OVERVIEW 1.1 PIN CONNECTIONS Figure 1. Pinout Diagram Y/CVBSOUT_VCR Y/CVBSOUT_TV R/COUT_TV VccB 3 COUT_VCR GOUT_TV VOUT_RF AOUT_RF BOUT_TV LOUT_TV FILTER VccB 1 VccB 2 VccB 4 VccB 5 GNDB FBOUT_TV FBIN_VCR FBIN_ENC C_GATE VDD ADD SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR Vcc12 BIN_VCR ROUT_TV Vccao LOUT_VCR ROUT_VCR LOUT_CINCH ROUT_CINCH NC GNDA VccA RIN_TV LIN_TV CVBSIN_TV RIN_VCR LIN_VCR Y/CVBSIN_VCR GND Vcc CVBSIN_AUX DECV Y/CVBSIN_ENC GND YIN_ENC RIN_AUX CIN_ENC LIN_AUX R/CIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC NC DECA Figure 2. Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 Symbol VCC CVBSIN_AUX DECV Y/CVBSIN_ENC GND YIN_ENC RIN_AUX CIN_ENC LIN_AUX R/CIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC NC DECA GND Y/CVBSIN_VCR LIN_VCR Description +5 V Supply CVBS Input from Auxiliary Video Decoupling Capacitor Y/CVBS Input from Encoder Ground Y Input from Encoder Audio Right Input from Auxiliary Chroma Input from Encoder Audio Left, Input from Auxiliary Red/Chroma Input from Encoder Audio Right, Input from Encoder Green Input from Encoder Audio Left, Input from Encoder Blue Input from Encoder Not Connected Audio Decoupling Capacitor Ground Y/CVBS Input from VCR SCART Audio Left, Input from VCR SCART 3/24 1 STV6412A Pin No. 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Symbol RIN_VCR CVBSIN_TV LIN_TV RIN_TV VCCA GNDA NC ROUT_CINCH LOUT_CINCH ROUT_VCR LOUT_VCR VCCAO ROUT_TV LOUT_TV FILTER AOUT_RF VOUT_RF VCCB5 BOUT_TV VCCB4 GOUT_TV GNDB R/COUT_TV VCCB3 Y/CVBSOUT_TV VCCB2 COUT_VCR VCCB1 Y/CVBSOUT_VCR FBOUT_TV FBIN_VCR FBIN_ENC C_GATE VDD ADD SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC12 BIN_VCR Description Audio Right, Input from VCR SCART CVBS Input from TV SCART Audio Left, Input from TV SCART Audio Right, Input from TV SCART Audio Supply Voltage - or - Audio Supply Decoupling Audio Ground Not Connected Audio Right Output to Cinch Audio Left Output to Cinch Audio Right Output to VCR SCART Audio Left Output to VCR SCART Audio Output Supply Voltage - or - Main Audio Supply Voltage Audio Right Output to TV SCART Audio Left Output to TV SCART Chroma Trap Filter Audio (L+R) Output to RF Modulator CVBS Video Output to RF Modulator Video Output Buffer Supply Pin Blue Output to TV SCART Video Output Buffer Supply Pin Green Output to TV SCART Video Buffer Ground Red/Chroma Output to TV SCART Video Output Buffer Supply Pin Y/CVBS Output to TV SCART Video Output Buffer Supply Pin Chroma Output to VCR SCART Video Output Buffer Supply Pin Y/CVBS Output to VCR SCART Fast Blanking Output to TV SCART Fast Blanking Input from VCR SCART Fast Blanking Input from Encoder External MOS Command for C_VCR bidirectional mode +5 V I2C Supply I2C Address Selection I2C Bus Clock I2C Bus Data Ground Digital Interrupt Output Slow Blanking Input/Output from TV SCART Red Input (or C Input) from VCR SCART Slow Blanking Input/Output from VCR SCART Green Input from VCR SCART +12 V Supply Blue Input from VCR SCART 4/24 STV6412A Figure 3. STV6412A Block Diagram FBIN_ENC FBIN_VCR FBIN_ENC FBIN_VCR FBOUT_TV FB Switch BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR Mute R/CIN_VCR CIN_ENC R/CIN_ENC Mute BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR Mute 3 to 9 dB BOUT_TV 3 to 9 dB GOUT_TV 3 to 9 dB RGB Switch R/COUT_TV 6 dB CIN_ENC C Switch CVBSIN_AUX Y/CVBSIN_VCR CVBSIN_AUX Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Mute Mute Mute CIN_ENC R/CIN_ENC Mute VOUT_RF 6 dB FILTER YIN_ENC Y/CVBSIN_ENC Y/CVBS Switch Y/CVBSOUT_TV C_GATE 6 dB COUT_VCR C Switch CVBSIN_AUX CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute 6 dB SLOW BLANK MONITOR INTERRUPT SIGNAL IT_OUT SLB_TV SLB_VCR Y/CVBSOUT_VCR CVBSIN_TV Y/CVBS Switch LIN_AUX LIN_ENC 0/6/9 dB LIN_AUX LIN_ENC LIN_TV RIN_AUX RIN_ENC RIN_TV LOUT_VCR ROUT_VCR LIN_TV RIN_AUX RIN_ENC RIN_TV LIN_VCR 0/6/9 dB Mute 0/6 dB ROUT_CINCH VCR Switch 0/6 dB LOUT_CINCH LIN_AUX LIN_ENC LIN_VCR LIN_TV RIN_AUX RIN_ENC -62 dB 0/6 dB 0/6 dB AOUT_RF LOUT_TV ROUT_TV RIN_VCR RIN_VCR -62 dB 0/6 dB RIN_TV Mute ADD IC BUS DECODER SDA SCL TV Switch 5/24 STV6412A Figure 4. Functional Block Diagram AUDIO L AUDIO R R/C G B FAST BLANK CVBS AUDIO L AUDIO R CVBS/Y AUDIO L AUDIO R SLOW BLANK CVBS AUDIO L+R CVBS AUDIO L AUDIO R CINCH OUTPUT STV6412A R, G, B, FB SWITCHES SCART1 TV CVBS/Y SWITCHES R/C G B FAST BLANK CVBS/Y C AUDIO L AUDIO R Y R/C G B FAST BLANK CVBS/Y AUDIO L AUDIO R CVBS/Y C AUDIO L AUDIO R SLOW BLANK ENCODER RF MOD CHROMA SWITCHES AUX AUDIO SWITCHES SCART2 VCR MICRO INTERRUPT SLOW BLANK, I/O CONTROL 6/24 STV6412A 2 ELECTRICAL CHARACTERISTICS 2.1 Absolute Maximum Ratings Symbol VCC12 VCCAO VCCA VDD Vcc, VCCBi VI Voltage at Pin I to GND: Supply voltage for: Parameter - Slow blanking sections - Audio drivers - Internal Digital Audio parts - Digital parts - Video sections - Audio pins - Video pins - Bus pins - Slow blanking pins VESD Toper Tstg Maximum ESD voltage allowed. 100 pF capacitor discharged through 1.5 k serial resistor (Human Body Model) Operating Ambient Temperature Storage Temperature Value 13.2 13.2 10 6 6 0, VCCA 0, VCC or VCCBi 0, 5.5 0, VCC12 4 0, +70 -20, +150 Units V V V V V V V V V kV C C 2.1.1 Thermal Data Symbol Rth(j-a) Parameter Junction-ambient Thermal Resistance (Maximum) Value 48 Units C/W 2.1.2 Latch Up At an ambiant temperature of 25 C, all pins meet the following specifications: - I trigger = 200 mA or I trigger = 200 mA. - Pin 58 (IT_OUT) does not meet this specification and the trigger current must be limited to -100 mA. 2.2 Recommended Operating Conditions Tamb = 25 C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 , RLOUTA = 10 k, RGV = 50 , RLOUTV = 150 , unless otherwise specified. Table 1. Supply Voltages Symbol VDD VCCAO VCC VCC12 Parameter Digital Supply Voltage Audio Operating Supply Voltage Video Operating Supply Voltage Slow Blanking Control Supply Voltage - Decoupling capacitor on VCCA - Connected to VCCA Test Conditions Min. 4.75 11.2 8.5 4.75 11.2 Typ. 5 12 9 5 12 Max. 5.25 12.8 9.5 5.25 12.8 Units V V V V V Table 2. Active Mode (All channels ON) Symbol IDD ICCA Parameter Digital Supply Current Audio Supply Current Test Conditions VDD = 5 V VCCAO = 12 V, no load Min. Typ. 4.5 9 Max. 10 15 Units mA mA 7/24 STV6412A Symbol ICCV ICC12 Parameter Total Video Supply Current (VCC+V CCB1+VCCB2+VCCB3+V CCB4+VCCB5) Test Conditions VCC = 5 V, no load VCC12 = 12 V SLB input mode SLB output mode, no load Min. Typ. 43 0 2.5 Max. 60 1 4 Units mA mA 12 V Supply Current Table 3. Standby Mode (All channels OFF) Symbol IDD ICCAstd ICCVstd Parameter Digital Supply Current Audio Supply Current Total Video Supply Current Test Conditions VDD = 5 V VCCA0 = 12 V, no load VCC = 5 V Min. Typ. 4.5 3 1 Max. 10 Units mA mA mA 2.3 Audio Section Characteristics Tamb = 25C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, V DD = 5 V RGA = 600 , RLOUTA = 10 k, R GV = 50 , RLOUTV = 150 , unless otherwise specified. Table 4. Audio Section Characteristics Symbol SVR100 Parameter Supply Voltage Rejection Test Conditions VRIPPLE = 500m VRMS at f = 100 Hz, Gain= 0 dB, DECA filter cap = 47 F DECA filter cap = 220 F VRIPPLE = 500m VRMS at f = 1 kHz, Gain = 0 dB VCCA = 9 V 30 -3 dB, 0.5 VRMS, RLOAD = 10 k, Gain = 0 dB -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB VIN = 0.5 VRMS, f = 1 kHz, on one input, RLOAD = 10 k, Gain = 0 dB VIN = 1 Vpp, f = 15 kHz, on one point VCCA = 9 V Switching between inputs f = 1 kHz, 1 VRMS input on each input channel f = 1 kHz, 1 VRMS input (gain = 0dB) weighted CCIR 468-4 quasi peak BW = 20 Hz, 20 kHz Flat, Gain = 0 dB 0.5 VRMS, RLOAD = 10 k, Gain = 0 dB -0.5 70 5 +0.5 80 70 90 74 85 VCCA/2 1 60 15 120 3 Min. Typ. Max. Units 60 70 70 80 80 VCCA/2 2 50 2 10 dB dB dB V VRMS k % kHz 0.5 dB dB dB dB V mV W deg. dB V dB SVR1K VINDC VINAC RIN RINmatch FRANGE Flatness CS Ci VOUT VOFF ROUT PHD ASN eNI G0 Supply Voltage Rejection Input DC Level Input Signal Amplitude Input Resistance Input Resistance Matching Bandwidth Spread of Gain in Audio Band Channel Separation, from audio inputs Between L & R of TV outputs Channel Isolation from video inputs Output DC Level DC Offset Change Output Resistance Phase Difference S/N Ratio Equivalent RMS Input Voltage Noise 0 dB Gain 50 8/24 STV6412A Symbol GSTEP Gain Step Parameter Test Conditions -62 dB to +6 dB ( see Figure 2) VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB VIN = 0.5 VRMS, 1 kHz, Gain = 0 dB Min. Typ. 2 Max. Units dB 0.5 0.5 dB dB Gain matching between different inGMATCH1 puts of one output GMATCH2 Gain matching between Left/Right outputs of one input channel Total Harmonic Distortion THD0 THD6 THD9 VCL RL Mute ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB Output Clipping Level Output Load Resistance Mute Suppression -0.5 -0.5 VOUT = 0.5 VRMS, 1 kHz, LPF @ 80 kHz THD = 0.2%, 1 kHz VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB VIN = 0.5 VRMS, on one point 2.1 2 -90 0.01 0.01 0.01 2.3 2.25 0.1 0.1 0.1 % % % VRMS k dB 2.4 Video Section Characteristics Tamb = 25 C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 , RLOUTA = 10 k, R GV = 50 , RLOUTV = 150 , unless otherwise specified. Table 5. Video Section Characteristics Symbol VDCIN ICLAMP ILEAK CIN VIN DYN BW Parameter DC Input Level Clamping Current Input Leakage Current Input Capacitance Max Input Signal Dynamic Output Signal VCC = 5 V VCC = 5 V 12 12 8 Test Conditions Bottom Synch Pulse at VDCIN -400 mV VIN = VDCIN +1 V 1 Min. Typ. 2 2 1 2 1.5 3 15 15 10 10 Max. Units V mA A pF VPP VPP MHz MHz MHz Bandwidth at -3 dB VIN = 1 VPP Y/CVBS RGB VIN = 1 VPP Y/C Mixer (on VOUT-RF) VIN = 1 VPP, VINC = muted Spread of Gain in Video Band (15 kHz - 5 MHz) Y/CVBS VIN = 1 VPP RGB VIN = 1 VPP Y/C Mixer (on VOUT-RF) VIN = 1 VPP, VINC = muted Crosstalk Isolation between Input Channel Crosstalk Isolation between Output Channel Output Resistance Gain at RGB outputs Gain matching between R, G, B Gain on Y,/CVBS channels Gain matching between Y, CVBS inputs VIN = 1 Vpp, gain set to 6 dB VIN = 1 VPP, gain set to 6 dB 3 dB to 6 dB VIN = 1 VPP VIN = 1 VPP VIN = 1 VPP at f = 4.43 MHz, on one point VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150 Flatness +/-0.5 +/-0.5 +/-1.5 60 50 5 5.5 -0.3 0.75 5.5 -0.5 6 0 1 6 0 10 6.5 0.3 1.25 6.5 0.5 dB dB dB dB dB dB dB dB dB dB CTi CTo ROUT GRGB GRGBM GYCVBS GYCVBSM GRGBSTEP Step of Gain 9/24 STV6412A Symbol DCOUT DCOUT RF DPHI DG Mute LNL VSN Parameter DC Output Voltage RF Output Voltage Differential Phase Differential Gain Mute Suppression Luminance non-linerarity Video S/N Ratio Test Conditions Bottom sync pulse Bottom sync pulse VIN = 1 VPP at f = 4.43 MHz VIN = 1 VPP at f = 4.43 MHz VIN = 1 VPP at f = 5 MHz on one point Refer to Note 1 Min. Typ. 0.6 1 1 1 Max. Units V V 5 5 deg. % dB -55 0.3 65 3 % dB Note 1: S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS ) weighted CCIR 567). 2.5 Chroma Section Characteristics Tamb = 25 C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 , RLOUTA = 10 k, R GV = 50 , RLOUTV = 150 , unless otherwise specified. Table 6. Chroma Section Characteristics Symbol VDCIN RIN CIN VIN DYN DCOUT CBW CTi CTo ROUT GOUTC GCM Mute CToYdel CToYdel Parameter DC Input Level Input Resistance Input Capacitance Max Input Signal Dynamic Output Signal DC Output VCR Voltage Chroma Bandwidth Crosstalk Isolation between Input Channel Crosstalk Isolation between Output Channel Output Resistance Gain at OUTC Gain matching between C inputs Mute Suppression Chroma to luma delay, source Y/C Chroma to luma delay, source Y/C VIN = 1 Vpp VIN = 1 VPP VIN = 1 VPP at f = 4.43 MHz, on one input Pin other than VOUT_RF, VPP @ 4.43 MHz, Pin VOUT_RF 5.5 -0.5 -55 20 20 CIN = 1 VPP at -3 db VIN = 1 VPP at f = 4.43 MHz, on one input VIN = 1 VPP at f = 4.43 MHz, on one input, RLOAD = 150 10 55 50 5 6 0 10 6.5 0.5 30 Test Conditions Min. Typ. 3 50 2 1.5 3 2.2 Max. Units V k pF VPP VPP V MHz dB dB W dB dB dB ns ns 2.6 Blanking Section Tamb = 25 C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 , RLOUTA = 10 k, R GV = 50 , RLOUTV = 150 , unless otherwise specified. Table 7. Slow Blanking Section Symbol INPUT MODE SLBlow SLBhigh Input Low Level Threshold Input High Level Threshold 2.5 7.5 3.25 8.25 4 9 V V Parameter Test Conditions Min. Typ. Max. Units 10/24 STV6412A Symbol IIN SLBlow SLBmed SLBhigh OUTPUT MODE Parameter Input Current Output Low Level (int. TV) Output Medium Level (ext. 16/9) Output High Level (ext. 4/3) Test Conditions Min. Typ. 50 Max. Units 100 1.5 6.5 12 A V V V 0 5 10 0.02 5.75 11 Table 8. Fast Blanking Section Symbol INPUT MODE FBlow/high IIN FBLOW FBHIGH FBDEL Input Low/High Level Threshold Input Current Output Low Level Output High Level Fast Blanking RGB delay 0.4 0.7 2 0.9 10 0.5 3.0 3.4 15 3.8 V A V V ns Parameter Test Conditions Min. Typ. Max. Units OUTPUT MODE RLOAD = 150 At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% FBTRANS FB Transitions at FB output Rise Time Fall Time 10 10 ns ns Table 9. C_Gate Function Output Symbol C_GATE-L Parameter Output Low Level Test Conditions IIN = 0 mA IIN = 1 mA Min. Typ. 20 0.3 0.7 Max. Units k V V C_GATE-H Pull-up Resistor Value to VCCB1 Table 10. Interrupt Output (Refer to Note 2) Symbol IT-Leak IT-Low Parameter High Level Leakage Output Low Level (Active) Test Conditions External pull-up to 5 V IIN = 0 mA IIN = 1 mA Min. Typ. Max. Units 10 0.3 0.7 A V V Table 11. Address Selection Input Symbol ADDsel_L ADDsel_H ILEAK Parameter Address Selection Low Level Address Selection High Level Leakage Current 2.5 Test Conditions Min. Typ. 0 Max. Units 0.2 VDD 10 V V A Note 2: The interrupt is forced to a low level when a change is detected on slow blanking inputs. It can be used in Standby mode to wake up the microprocessor. It is released when the I2C bus register is read. 11/24 STV6412A 2.7 IC Bus Characteristics Tamb = 25C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, V DD = 5 V RGA = 600, R LOUTA = 10k, RGV = 50, R LOUTV = 150, unless otherwise specified. Table 12. IC Bus Characteristics Symbol SCL VIL VIH ILI SDA VIL VIH ILI CI tR tF VOL tF CL TIMING tLOW tHIGH tSU,DAT tHD,DAT tSU,STO tBUF tHD,STA tSU,STA Clock Low Period Clock High Period Data Setup Time Data Hold Time Setup Time from Clock High to Stop Start Setup Time following a Stop Start Hold Time Start Setup Time following Clock Low to High Transition 4.7 4 250 0 4 4.7 4 4.7 340 s s ns ns s s s s Low Level Input Voltage High Level Input Voltage Input Leakage Current Input Capacitance Input Rise Time Input Fall Time Low Level Output Voltage Output Fall Time Load Capacitance 1.5 V to 3 V 3 V to 1.5 V IOL = 3 mA 3 V to 1.5 V VIN = 0 to 5.5 V -0.3 2.3 -10 0 1.5 5.5 10 10 1 300 0.4 250 400 V V A pF s ns V ns pF Low Level Input Voltage High Level Input Voltage Input Leakage Current VIN = 0 to 5.5 V -0.3 2.3 -10 0 1.5 5.5 10 V V A Parameter Test Conditions Min. Typ. Max. Units Note 3: The device can also operate at 400 kHz and is capable of interfacing with +3.3 V or + 5 V logic levels. Figure 5. IC Bus Timing (start, stop) 12/24 STV6412A 3 I2C BUS SELECTION Data transfers follow the usual I2C format; i.e. after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC's I 2C bus decoder enables the automatic incrementation mode in write mode. String Format Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) S S SLAVE ADDRESS 0 A SUB-ADDRESS 1 A3 1 A DATA0 Sub-Address A A2 0 DATA1 A A A A1 1 DATAn DATA DATA A A A0 X A P P P Read only mode SLAVE ADDRESS Address Value S SLAVE ADDRESS A6 1 0 A A5 0 SUB-ADDRESS A4 0 Slave Address Auto Increment Mode .... Sub-Address +1 Sub-Address + N 3.1 I2C Bus Addresses Write Address: 1001 01X0, Read Address: 1001 01X1 Address Selection Pin Grounded: X = 0, write address = 94(hex), read address = 95(hex) Address Selection Pin to Supply: X = 1, write address = 96(hex), read address = 97(hex) Table 13. Input Signal Summary (Write Mode) Reg Addr (Hex) Data d7 d6 d5 d4 d3 d2 d1 d0 AUDIO 00 01 TV Stereo Mono VCR Stereo Mono VCR Chroma muted RGB and FB Tri-state TV 0/6 dB Not Used TV Volume-62 dB to 0 dB - 2 dB steps VCR Audio Switch Control CINCH Audio Gain TV Chroma muted Soft Volume Mode TV/CINCH Audio Switch Control VIDEO 02 03 VCR Video and Chroma Switch Control RGB Gain TV Video and Chroma Switch Control Fast Blanking Mode/Input Selection TV R or C Output Selection ENC R/C sub Clamp ENC Inputs RGB Switch Control MISCELLANEOUS 04 05 IT Enable SLB Mode Not Used VCR-C VCR-C Gate RF Trap RF Adder Output Control Control Filter Control Control ENC Audio Input Gain 0/6/9 dB AUX Inputs TV Inputs VCR R/C sub Clamp VCR Inputs VCR Slow Blanking TV Slow Blanking STB-BY 06 RF Outputs TV Outputs CINCH Outputs VCR Outputs Note 4: Unused data must be set to "0". 13/24 STV6412A Table 14. TV Audio Output Reg. Addr (Hex) Data Description Soft Volume Change Level Adjustment 00 6 dB Extra Gain TV Stereo or Mono Mode Bits 1 5 1 1 d7 X X X X X X 0 1 d6 X X X X 0 1 X X d5 X X 0 1 X X X X d4 X X 0 1 X X X X d3 X X 0 1 X X X X d2 X X 0 1 X X X X d1 X X 0 1 X X X X d0 0 1 X X X X X X Active Disabled 0 dB -62 dB (-2 dB/step) 0 dB +6 dB 0 = Stereo 1 = Mono Comments Table 15. Audio Selection & VCR Audio Output Reg. Addr (Hex) Data Description Bits 3 d7 X X X X X X X X X X X X X X 0 1 d6 X X X X X X X X X X X X X X X X d5 X X X X X X X X X X 0 0 1 1 X X d4 X X X X X X X X X X 0 1 0 1 X X d3 X X X X X X X X 0 1 X X X X X X d2 0 0 0 0 1 1 1 1 X X X X X X X X d1 0 0 1 1 0 0 1 1 X X X X X X X X d0 0 1 0 1 0 1 0 1 X X X X X X X X Comments Muted Encoder L/R selected VCR L/R selected AUX L/R selected TV L/R selected Not allowed Not allowed Not allowed 0 dB Follow TV Gain Muted Encoder L/R selected TV L/R selected AUX L/R selected 0 = Stereo 1 = Mono TV & CINCH Audio Output Selection 01 CINCH Audio Gain 1 2 VCR Audio Output Selection 1 VCR Stereo or Mono Mode 14/24 STV6412A Table 16. TV & VCR Video Selection Reg. Addr (Hex) Data Description Bits 3 d7 X X X X X X X X X X X X X X X X X X 0 1 d6 X X X X X X X X X X 0 0 0 0 1 1 1 1 X X d5 X X X X X X X X X X 0 0 1 1 0 0 1 1 X X d4 X X X X X X X X X X 0 1 0 1 0 1 0 1 X X d3 X X X X X X X X 0 1 X X X X X X X X X X d2 0 0 0 0 1 1 1 1 X X X X X X X X X X X X d1 0 0 1 1 0 0 1 1 X X X X X X X X X X X X d0 0 1 0 1 0 1 0 1 X X X X X X X X X X X X Comments Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR CVBS_AUX & Chroma muted Not allowed Not allowed Not allowed Chroma defined by d2d1d0 Chroma force to mute Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & Chroma muted CVBS_AUX & Chroma muted Not allowed Not allowed Not allowed Chroma defined by d6d5d4 Chroma force to mute TV Video Output Selection TV Chroma Output Control 02 1 3 VCR Video Output Selection VCR Chroma Output Control 1 Table 17. RGB & Fast Blanking Outputs Reg. Addr (Hex) Data Description Fast Blanking Control Bits 2 d7 X X X X X X X X X X X X X X 0 1 d6 X X X X X X X X X X X X 0 1 X X d5 X X X X X X X X 0 0 1 1 X X X X d4 X X X X X X X X 0 1 0 1 X X X X d3 X X X X 0 0 1 1 X X X X X X X X d2 X X X X 0 1 0 1 X X X X X X X X d1 0 0 1 1 X X X X X X X X X X X X d0 0 1 0 1 X X X X X X X X X X X X Comments FB forced to low level FB forced to high level FB from Encoder FB from VCR Muted RGB_ENC selected RGB_VCR selected Not allowed +6 dB +5 dB +4 dB +3 dB gain gain gain gain RGB Selection 2 03 RGB Gain 2 1 RGB and Fast Blanking Control 1 +0 dB extra gain +3 dB for weak input signals RGB and FB outputs high impedance state RGB and FB outputs active 15/24 STV6412A Table 18. RF & Miscellaneous Control Reg. Addr (Hex) Data Description R/C TV Output Selection RF Output: Adder control and chroma sub-carrier filter selection 04 C_Gate Output Control C_VCR Output Control Slow Blanking Mode IT Enable Bits 1 2 d7 X X X X X X X X X X X X 0 1 d6 X X X X X X X X X X 0 1 X X d5 X X X X X X X X X X X X X X d4 X X X X X X X X 0 1 X X X X d3 X X X X X X 0 1 X X X X X X d2 X X X X 0 1 X X X X X X X X d1 X X 0 1 X X X X X X X X X X d0 0 1 X X X X X X X X X X X X Comments Red signal selected Chroma signal selected CVBS to RF output Y + C to RF output Filter not active Filter active High level Low level Tri-state mode (high impedance) Active Normal Mode SLB TV is driven by SLB VCR No interrupt flag IT enable 1 1 1 1 Table 19. Slow Blanking & Inputs Control Reg. Addr (Hex) Data Description Encoder R/Csub Clamp VCR R/Csub Clamp Encoder Input Level Adjustment 05 Slow Blanking TV SCART 2 Slow Blanking VCR SCART Bits 1 1 2 d7 X X X X X X X X X X X 0 0 1 1 d6 X X X X X X X X X X X 0 1 0 1 d5 X X X X X X X 0 0 1 1 X X X X d4 X X X X X X X 0 1 0 1 X X X X d3 X X X X 0 0 1 X X X X X X X X d2 X X X X 0 1 0 X X X X X X X X d1 X X 0 1 X X X X X X X X X X X d0 0 1 X X X X X X X X X X X X X Comments Bottom level clamp Average level clamp Bottom level clamp Average level clamp 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs Input mode only Output < 2 V Output 16/9 format Output 4/3 format Input mode only Output < 2 V Output 16/9 format Output 4/3 format 2 16/24 STV6412A Table 20. Standby Modes Reg. Addr (Hex) Data Description ENC Inputs VCR Inputs TV Inputs AUX Inputs 06 VCR Outputs CINCH Outputs TV Outputs RFmod Outputs Full Stop Bits 1 1 1 1 1 1 1 1 d7 X X X X X X X X X X X X X X 0 1 1 d6 X X X X X X X X X X X X 0 1 X X 1 d5 X X X X X X X X X X 0 1 X X X X 1 d4 X X X X X X X X 0 1 X X X X X X 1 d3 X X X X X X 0 1 X X X X X X X X 1 d2 X X X X 0 1 X X X X X X X X X X 1 d1 X X 0 1 X X X X X X X X X X X X 1 d0 0 1 X X X X X X X X X X X X X X 1 Comments Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Audio Audio Audio Audio & Video Outputs ON & Video Outputs OFF & Video Outputs ON & Video Outputs OFF Only I2C bus and slow blanking detection parts are supplied. Table 21. Output Signals (Read Mode) Reg. Addr (Hex) Data Description Bits 2 Slow Blanking TV SCART 2 Slow Blanking VCR SCART 1 Interrupt Flag d7 X X X X X X X X d6 X X X X X X X X d5 X X X X X X X X d4 X X X X X X 0 1 d3 X X X 0 1 1 X X d2 X X X 1 0 1 X X d1 0 1 1 X X X X X d0 1 0 1 X X X X X Input Input Input Input Input Input Comments <2 V 16/9 format 4/3 format <2 V 16/9 format 4/3 format No change since read One change has been detected (refer to Note 5) Note 5: The Interrupt Flag will be cleared when this register is read. To prepare for a new interrupt, a "1" must be re-written in the IT Enable bit (Reg. 04, d7). 3.2 Power-on Reset -- Bus Register Initial Conditions Power-on Reset is active when the supply V DD is less than 3.5 volts. Non-significant bits (X) are pre-set to "0". Reg. Addr (Hex) d7 00 01 02 03 04 0 0 0 0 0 Data d6 0 0 0 0 0 d5 0 0 0 0 0 d4 0 0 0 0 0 d3 0 0 0 0 0 d2 0 0 0 0 0 d1 0 0 0 0 0 d0 0 0 0 0 0 Comments Audio TV and Cinch outputs are in Stereo Mode, 0 dB Gain Adjustment. TV, Cinch and VCR audio outputs are muted. VCR output is in Stereo Mode. VCR, TV and RFmod video outputs are muted. Fast Blanking is forced to `0'. RGB outputs are muted and in high impedance. C_GATE is high. C_VCR is high impedance. 17/24 STV6412A Reg. Addr (Hex) d7 05 06 0 0 Data d6 0 0 d5 0 0 d4 0 0 d3 0 0 d2 0 0 d1 0 0 d0 0 0 Comments Encoder and VCR R/Csub Bottom Level Clamp, RGB outputs 6 dB Gain, and Slow Blanking parts are in read mode. All internal blocks are ON. Figure 6. Volume Control Characteristics 0 18 31 0.5 dB Step Number -36 0.5 dB + 2 dB -62 dB - 0.5 dB 18/24 STV6412A 4 INPUT/OUTPUT GROUPS Figure 7. Bottom Clamped Video Inputs (Pins 2, 4, 6, 12, 14, 18, 21, 62, 64) VCC 5 V VCC 5 V VCC 5 V IB 2 V + VD 25 k 25 k 3V Figure 10. Average Clamped Video Inputs (Pin8) VCC 5 V 15 k tri tri Protected Pad Protected Pad Figure 8. R/C Clamped Video Inputs (Pins 10, 60) Figure 11. Cgate Logical Output (Pin 52) VDD 5 V VCCB1 5 V R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. 18 k 50 ohms Protected Pad Figure 12. Fast Blanking Output (Pin 49) Figure 9. Fast Blanking Inputs (Pins 50, 51) VCCB1 5 V VCCB1 5 V VCCB1 5 V tri Protected Pad Protected Pad 19/24 STV6412A Figure 13. Video Outputs (Pins 38, 40, 42, 44, 46, 48) VCC 5 V VCCB1,2 ...7 5 V Figure 16. Trap Filter (Pin 34) VCC 5 V VCCB5 5 V 1 k 100 ib Protected Pad Protected Pad Figure 14. Audio Inputs (Pins 7, 9 11, 13, 19, 20, 22, 23) VCCA 9 V Figure 17. Audio Outputs (Pins 27, 28, 29, 30, 32, 33,35) VCCAO I2 V 50 k VCC/2 60 W IB Protected Pad Protected Pad Figure 18. Interrupt Output (Pin 58) Figure 15. Slow Blanking I/O (Pins 59, 61) VCC 12 V VDD 5 V VCC12 12 V 1 k 40 Float 25 k 110 k 55 k Protected Pad Protected Pad 20/24 STV6412A Figure 19. I2C Bus (SDA) (Pin 56) VDD 5 V Float Acknowledge Figure 21. IC Bus (SCL) (Pin 55) VDD 5 V Float 10 k 10 k Protected Pad Protected Pad Protected Pad Figure 20. I2C Bus (ADD) (Pin 54) VDD 5 V Float 10 k Protected Pad Figure 22. Power Supply Connection VCCB1 VCCB2 VCCB3 VCCB4 VCCB5 VCCA0 VCCA VCC VCC 12 VDD Float 47 45 43 39 37 31 12 V 24 10 V 25 17 1 63 12 V 53 5V 41 GNDP 5 GNDV 57 GDD GNDA GNDref These symbols represent some huge diode and Zener-like components used for ESD protection of the device. They are not supposed to be paths for any current in normal operation mode. 21/24 STV6412A 5 APPLICATION DIAGRAM Modulator 4.43MHzTrap STV6412A For more details refer to STV6412 Application Note. 22/24 STV6412A 6 PACKAGE MECHANICAL DATA Figure 23. 64 Pins -- Thin Full Plastic Quad Flat Pack (TQFP) A A2 64 e A1 49 0,10 mm .004 inch 48 SEATING PLANE 1 16 33 c 17 D3 D1 D 32 L1 L E3 E1 E 0,25 mm .010 inch GAGE PLANE K Dimensions A A1 A2 B C D D1 D3 e E E1 E3 L L1 K Millimeters Min. 0.05 1.35 0.30 0.09 16.00 14.00 12.00 0.80 16.00 14.00 12.00 0.45 0.60 1.00 0 (Min.), 7 (Max.) 0.75 0.018 1 1.40 0.37 Typ. Max. 1.60 0.15 1.45 0.45 0.20 0.002 0.053 0.0118 0.0035 Min. Inches Typ. Max. 0.063 0.006 0.055 0.0146 0.630 0.551 0.472 0.0315 0.630 0.551 0.472 0.024 0.039 0.030 0.057 0.0177 0.0079 B 23/24 STV6412A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without the express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c)2003 STMicroelectronics - All Rights Reserved. Purchase of I2C Components by STMicroelectronics conveys a license under the Philips I2C Patent. Rights to use these components in an I2C system is granted provided that the system conforms to the I2C Standard Specification as defined by Philips. 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